The effect of HALO dose on device parameter degradation of pMOSFET with 2.1nm o xide and 0.135μm channel length at hot carrier stress is analyzed.It is found that the degradation mechanism is not sensitive to HALO dose changing,but the d egradation quantities of linear drain current,saturation drain current,and maxim um transconductance increase with HALO dose enhancing and are larger than those of speculated before.The degradation of device parameters (linear drain current, saturation drain current,and maximum transconductance) is attributed to not onl y the drain series resistance enhancing induced by interface states under spacer oxide and carrier mobility degradation but also the threshold voltage variation and initial threshold voltage increasing with HALO dose enhancing.
Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of Hu's lifetime prediction model have a close relationship with oxide thickness.Furthermore,a linear relationship is found between m and n .Based on this result,the lifetime prediction model can be expended to the device with thinner oxides.
Gate current for pMOSFETs is composed of direct tunneling current,channel hot hole,electron injection current,and highly energetic hot holes by secondary impact ionization.The device degradation under V g=V d/2 is mainly caused by the injection of hot electrons by primary impact ionization and hot holes by secondary impact ionization,and the device lifetime is assumed to be inversely proportional to the hot holes,which is able to surmount Si-SiO 2 barrier and be injected into the gate oxide.A new lifetime prediction model is proposed on the basis and validated to agree well with the experiment.
The degradation characteristics of both wide and narrow devices under V _g= V _d/2 stress mode is investigated.The width-enhanced device degradation can be seen with devices narrowing.The main degradation mechanism is interface state generation for pMOSFETs with different channel width.The cause of the width-enhanced device degradation is attributed to the combination of width-enhanced threshold voltage and series resistance.
Hot carrier effects of p MOSFETs with different oxide thicknesses are studied in low gate voltage range.All electrical parameters follow a power law relationship with stress time,but degradation slope is dependent on gate voltage.For the devices with thicker oxides,saturated drain current degradation has a close relationship with the product of gate current and electron fluence.For small dimensional devices,saturated drain current degradation has a close relationship with the electron fluence.This degradation model is valid for p MOSFETs with 0 25μm channel length and different gate oxide thicknesses.
