Due to the fact that the register files seriously affectthe performance and area of coarse-gained reconfigurablecryptographic processors, an efficient structure of thedistributed cross-domain register file is proposed to realize acryptographic processor with a high performance and a lowarea cost. In order to meet the demands of high performanceand high flexibility at a low area cost, a union structure withthe multi-ports access structure, i, e., a distributed cross-domain register file, is designed by analyzing the algorithmfeatures of different ciphers. Considering different algorithmrequirements of the global register files and local register files,the circuit design is realized by adopting different designparameters under TSMC （ Taiwan SemiconductorManufacturing Company） 40 nm CMOS（complementary metaloxide semiconductor） technology and compared with othersimilar works. The experimental results show that theproposed distributed cross-domain register structure caneffectively improve the performance of the unit area, of whichthe total performance of block per cycle is improved by17.79% and performance of block per cycle per area isimproved bv 117 %.
