A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surrounding- gate （JLDMCSG） metal-oxide-semiconductor field-effect transistors （MOSFETs） is proposed. It is derived by solving the two-dimensional Poisson＇s equation in two continuous cylindrical regions with any simplifying assumption. Using this analytical model, the subthreshold characteristics of JLDMCSG MOSFETs are investigated in terms of channel electro- static potential, horizontal electric field, and subthreshold current. Compared to junctionless single-material cylindrical surrounding-gate MOSFETs, JLDMCSG MOSFETs can effectively suppress short-channel effects and simultaneously im- prove carrier transport efficiency. It is found that the subthreshold current of JLDMCSG MOSFETs can be significantly reduced by adopting both a thin oxide and thin silicon channel. The accuracy of the analytical model is verified by its good agreement with the three-dimensional numerical simulator ISE TCAD.
Based on the quasi-two-dimensional （2D） solution of Poisson＇s equation in two continuous channel regions, an an- alytical threshold voltage model for short-channel junctionless dual-material cylindrical surrounding-gate （JLDMCSG） metal-oxide-semiconductor field-effect transistor （MOSFET） is developed. Using the derived model, channel potential dis- tribu6o~, h~riz~atal electrical ~eld distributign, a~d threshold v~ltage roll-off of ~LDMCSG MOSFET are in,instigated. Compared with junctionless single-material CSG （JLSGCSG） MOSFET~ JLDMCSG MOSFET can effectively suppress short-channel effects and simultaneously improve carrier transport efficiency. It is also revealed that threshold voltage roll- off of JLDMCSG can be significantly reduced by adopting both a small oxide thickness and a small silicon channel radius. The model is verified by comparing its calculated results with that obtained from three-dimensional （3D） numerical device simulator ISE.
In order to improve the drive current and subthreshold swing（SS）, a novel vertical-dual-source tunneling field-effect transistor（VDSTFET） device is proposed in this paper. The influence of source height, channel length and channel thickness on the device are investigated through two-dimensional numerical simulations. Si-VDSTFET have greater tunneling area and thinner channel, showing an on-current as high as 1.24 A at gate voltage of 0.8 V and drain voltage of 0.5 V, off-current of less than 0.1 f A, an improved average subthreshold swing of 14 m V/dec,and a minimum point slope of 4 m V/dec.
