We have provided optical simulations of the evanescently coupled waveguide photodiodes integrated with a 13- channels AWGs. The photodiode could exhibit high internal efficiency by appropriate choice of layers geometry and refrac- tive index. Aseamless joint structure has been designed and fabricated for integrating the output waveguides of AWGs with the evanescently coupled waveguide photodiode array. The highest simulation quantum efficiency could achieve 92% when the matching layer thickfiess of the PD is 120 nm and the insertion length is 2 μm. The fabricated PD with 320-nm-thick match.ing layer and 2-μm-length insertion matching layer present a responsivity of 0.87 A/W.
Ge condensation process of a sandwiched structure of Si/SiGe/Si on silicon-on-insulator （SOI） to form SiGe-on- insulator （SGOI） substrate is investigated. The non-homogeneity of SiGe on insulator is observed after a long time oxidation and annealing due to an increased consumption of silicon at the inflection points of the corrugated SiGe film morphology, which happens in the case of the rough surface morphology, with lateral Si atoms diffusing to the inflection points of the corrugated SiGe film. The transmission electron microscopy measurements show that the non-homogeneous SiGe layer exhibits a single crystalline nature with perfect atom lattice. Possible formation mechanism of the non-homogeneity SiGe layer is presented by discussing the highly nonuniform oxidation rate that is spatially dependent in the Ge condensation process. The results are of guiding significance for fabricating the SGOI by Ge condensation process.
High-performance Ge n~＋/p junctions were fabricated at a low formation temperature from 325℃ to 400℃ with a metal（nickel）-induced dopant activation technique. The obtained Ni Ge electroded Ge n＋/p junction has a rectification ratio of 5.6×10~4 and a forward current of 387 A/cm^2at -1 V bias. The Ni-based metal-induced dopant activation technique is expected to meet the requirement of the shallow junction of Ge MOSFET.
Modulation of the Schottky barrier heights was successfully demonstrated for WNx/p-Ge and WNx/n-Ge contacts by increasing the nitrogen component in the WNx films. The WN0.38/p-Ge contact exhibits rectifying characteristic and an apparent Schottky barrier of 0.49 eV while the WN0.38/n-Ge Schottky contact exhibits quasi-Ohmic current–voltage characteristics. Dipoles formed at the contact interface by the difference of the Pauling electronegativities of Ge and N are confirmed to alleviate the Fermi-level pinning effect.
We prepared germanium-on-insulator（GOI） substrates by using Smart-CutTM and wafer bonding technology. The fabricated GOI is appropriate for polishing due to a strong bonding strength（2.4 MPa） and a sufficient bonding quality.We investigated mechanical polishing and chemical-mechanical polishing（CMP） systematically, and an appropriate polishing method—mechanical polishing combined with CMP-is obtained.As shown by AFM measurement,the RMS of GOI after polishing decreased to 0.543 nm.And the Ge peak profile of the XRD curve became symmetric,and the FWHM is about 121.7 arcsec,demonstrating a good crystal quality.
Ge nano-belts with large tensile strain are considered as one of the promising materials for high carrier mobility metal- oxide-semiconductor transistors and efficient photonic devices. In this paper, we design the Ge nano-belts on an insulator surrounded by Si3N4 or SiO？ for improving their tensile strain and simulate the strain profiles by using the finite difference time domain （FDTD） method. The width and thickness parameters of Ge nano-belts on an insulator, which have great effects on the strain profile, are optimized. A large uniaxial tensile strain of 1.16% in 50-nm width and 12-nm thickness Ge nano-belts with the sidewalls protected by Si3N4 is achieved after thermal treatments, which would significantly tailor the band gap structures of Ge-nanobelts to realize the high performance devices.
This paper presents a high-responsivity and high-speed InGaAs/InP PIN photodetector integrated onto the silicon waveguide substrate utilizing the divinyltetramethyldisiloxane-benzocyclobutene （DVS-BCB） adhesive bonding method. A grating coupler is adopted to couple light from the fiber to the silicon waveguide. Light in the silicon photonic waveguide is evanescently coupled into the photodetector. The integrated photodetector structure is first simulated using the FDTD （finite difference time domain） solutions software and the simulation results show a detection efficiency of 95%. According to the simulation result, the integrated photodetector is fabricated. The measured responsivity of the fabricated integrated photodetector with a detection length of 30μm is 0.89 A/W excluding the coupling loss between the fiber and the grating coupler and the silicon propagation loss at the wave-length of 1550 nm with a reverse bias voltage of 3 V. Measured 3-dB bandwidth is 27 GHz using the Lightwave Component Analyzer （LCA）. The eye diagram signal test results indicate that the photodetector can operate at a high speed of 40 Gbit/s. The integrated photodetector is of great significance in the silicon-based optoelectronic integrated chip which can be applied to the optical communication and the super node data transmission chip of the high-performance computer.
